1. Field of Invention
The present invention relates to a buck switching regulator; particularly, it relates to such buck switching regulator having improved power utilization efficiency.
2. Description of Related Art
FIG. 1 shows a schematic diagram of a conventional buck switching regulator. The power stage 11 of the conventional buck switching regulator 10 comprises an upper-gate switch MA, a lower-gate switch MB and an inductor L, all of which are electrically connected to a switching node Lx and controlled by a driver circuit 12. In the driver circuit 12, an upper-gate driver circuit 121 and a lower-gate driver circuit 122 generate a first operation signal SA and a second operation signal SB in response to a first operation signal S121 and a second operation signal 5122, respectively, to turn ON/OFF the upper-gate switch MA and the lower-gate switch MB, thus delivering power from an input terminal IN to an output terminal OUT (The rest of the driver circuit 12 which is irrelevant to the present invention is omitted for simplicity).
When the input voltage Vin supplied from the power source is high, for better driving the upper-gate switch MA, the conventional buck switching regulator 10 usually includes a bootstrap capacitor CBOOT between the supply voltage Vdd in the driver circuit 12 and the source of the upper-gate switch MA (as shown in FIG. 1), i.e., between the boot node VBOOT and the switching node Lx, to provide a desired voltage difference between the gate and the source of the upper-gate switch MA. The voltage Vcap across the bootstrap capacitor CBOOT serves to provide an operational voltage to the upper-gate driver circuit 121. When the lower-gate switch MB is ON, the supply voltage Vdd in the driver circuit 12 charges the bootstrap capacitor CBOOT through a diode 13, so that when the lower-gate switch MB is OFF, the voltage at the boot node VBOOT becomes Vcap+VLx. Thus, the difference between the voltage at the boot node VBOOT (Vcap+VLx) and the voltage at the switching node Lx (VLx) can be Vcap to provide a driving voltage which is required by the upper-gate driver circuit 121. The diode 13 serves to prevent a reverse current from flowing from the boot node VBOOT toward the supply voltage Vdd when the voltage at the boot node VBOOT is higher than the supply voltage Vdd, so that there will not be such reverse current damaging the supply voltage Vdd. The output terminal can be electrically connected to a system load 16 or a battery (not shown). When the system load 16 is consuming power (i.e., when the buck switching regulator 10 is required to supply power to the system load 16), the upper-gate switch MA and the lower-gate switch MB continue switching to deliver power from the input terminal IN to the output terminal OUT, and further to the system load 16. Hence, the bootstrap capacitor CBOOT will be routinely charged and refreshed so that the voltage Vcap across the bootstrap capacitor CBOOT will be kept at a desired level.
Nevertheless, when the system load 16 is in a stand-by mode (i.e., when the system load 16 consumes no or little power), both the upper-gate switch MA and the lower-gate switch MB are turned OFF since there is no need to deliver power from the input terminal IN to the output terminal OUT. Under such circumstance, the bootstrap capacitor CBOOT will not be charged and refreshed, and the charges stored in the bootstrap capacitor CBOOT will dissipate so that the voltage Vcap across the bootstrap capacitor CBOOT will drop gradually. At a certain time point, when the system load 16 resumes its normal operation, the buck switching regulator 10 is again required to supply the power. However, due to insufficient voltage Vcap across the bootstrap capacitor CBOOT, the voltage at the boot node VBOOT is insufficient, so the upper-gate driver circuit 121 does not have a sufficient driving capability to drive the upper-gate switch MA. As a result, when the conventional buck switching regulator 10 restores operation, it is required to charge the bootstrap capacitor CBOOT first. The way for charging the bootstrap capacitor CBOOT is to turned ON the lower-gate switch MB first so that the switching node Lx is electrically connected to ground, whereby the supply voltage Vdd can charge the bootstrap capacitor CBOOT through the diode 13.
Please refer to FIG. 2, which is a schematic diagram showing how the conventional buck switching regulator 10 unnecessarily consumes power. As described above, during the transition from stand-by to normal operation, it is required to turn ON the lower-gate switch MB first (during the period from the time point “Restore Operation” to the time point T1, as shown in FIG. 2), so a reverse current will flow in the reverse direction from the output terminal OUT to the lower-gate switch MB. Next, during the period from the time point T1 to the time point T2, when the upper-gate switch MA is turned ON and the lower-gate switch MB is turned OFF, a reverse current will flow in the reverse direction from the output terminal OUT to the upper-gate switch MA. The above power transmission in the reverse directions from the output terminal OUT will result in unnecessarily waste of power. Furthermore, improper control of such reverse power transmission will result in a boost operation from the output terminal OUT to the input terminal IN. In addition, if the output terminal OUT is electrically connected to a battery (not shown), the battery will keep discharging, which is also undesired.
In order to overcome the above-mentioned drawbacks, U.S. Pat. No. 7,235,955 has proposed a solution, but its control mechanism is complicated.
In view of the above, to overcome the drawbacks in the prior art, the present invention proposes a buck switching regulator having improved power utilization efficiency.